Switchtec Userspace PROJECT_NUMBER = 4.2
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gasops.c
1/*
2 * Microsemi Switchtec(tm) PCIe Management Library
3 * Copyright (c) 2017, Microsemi Corporation
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be included
13 * in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
16 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21 * OTHER DEALINGS IN THE SOFTWARE.
22 *
23 */
24
25#include "gasops.h"
26#include "switchtec/gas.h"
27#include "../switchtec_priv.h"
28#include "switchtec/utils.h"
29
30#include <errno.h>
31#include <stddef.h>
32#include <string.h>
33#include <unistd.h>
34#include <sys/time.h>
35
36#define gas_reg_read8(dev, reg) __gas_read8(dev, &dev->gas_map->reg)
37#define gas_reg_read16(dev, reg) __gas_read16(dev, &dev->gas_map->reg)
38#define gas_reg_read32(dev, reg) __gas_read32(dev, &dev->gas_map->reg)
39#define gas_reg_read64(dev, reg) __gas_read64(dev, &dev->gas_map->reg)
40
41#define gas_reg_write8(dev, val, reg) __gas_write8(dev, val, \
42 &dev->gas_map->reg)
43#define gas_reg_write16(dev, val, reg) __gas_write16(dev, val, \
44 &dev->gas_map->reg)
45#define gas_reg_write32(dev, val, reg) __gas_write32(dev, val, \
46 &dev->gas_map->reg)
47#define gas_reg_write64(dev, val, reg) __gas_write64(dev, val, \
48 &dev->gas_map->reg)
49
51 int no_retry;
52 int num_subcmd;
53 int *subcmds;
54};
55static int fw_toggle_noretry_subcmds[] = {
56 MRPC_FW_TX_TOGGLE,
57};
58static const struct no_retry_struct gasop_noretry_cmds[] = {
59 [MRPC_SECURITY_CONFIG_SET] = {1, 0, NULL},
60 [MRPC_KMSK_ENTRY_SET] = {1, 0, NULL},
61 [MRPC_SECURE_STATE_SET] = {1, 0, NULL},
62 [MRPC_BOOTUP_RESUME] = {1, 0, NULL},
63 [MRPC_DBG_UNLOCK] = {1, 0, NULL},
64 [MRPC_FW_TX] = {1, 1, fw_toggle_noretry_subcmds},
65 [MRPC_SECURITY_CONFIG_SET_GEN5] = {1, 0, NULL},
66 [MRPC_KMSK_ENTRY_SET_GEN5] = {1, 0, NULL},
67 [MRPC_SECURE_STATE_SET_GEN5] = {1, 0, NULL},
68 [MRPC_BOOTUP_RESUME_GEN5] = {1, 0, NULL},
69 [MRPC_DBG_UNLOCK_GEN5] = {1, 0, NULL},
70 [MRPC_FW_TX_GEN5] = {1, 1, fw_toggle_noretry_subcmds},
71};
72static const int gasop_noretry_cmds_count = sizeof(gasop_noretry_cmds) /
73 sizeof(struct no_retry_struct);
74
75static inline bool gasop_is_no_retry_cmd(uint32_t cmd, int subcmd)
76{
77 int i;
78
79 cmd &= SWITCHTEC_CMD_MASK;
80
81 if (cmd >= gasop_noretry_cmds_count)
82 return 0;
83 if (gasop_noretry_cmds[cmd].no_retry == 0)
84 return 0;
85 if (gasop_noretry_cmds[cmd].num_subcmd == 0)
86 return 1;
87 for (i = 0; i < gasop_noretry_cmds[cmd].num_subcmd; i++) {
88 if (subcmd == gasop_noretry_cmds[cmd].subcmds[i])
89 return 1;
90 }
91
92 return 0;
93}
94
95int gasop_access_check(struct switchtec_dev *dev)
96{
97 uint32_t device_id;
98
99 device_id = gas_reg_read32(dev, sys_info.device_id);
100 if (device_id == -1)
101 return -1;
102 return 0;
103}
104
105void gasop_set_partition_info(struct switchtec_dev *dev)
106{
107 dev->partition = gas_reg_read8(dev, top.partition_id);
108 dev->partition_count = gas_reg_read8(dev, top.partition_count);
109}
110
111int gasop_cmd(struct switchtec_dev *dev, uint32_t cmd,
112 const void *payload, size_t payload_len, void *resp,
113 size_t resp_len)
114{
115 struct mrpc_regs __gas *mrpc = &dev->gas_map->mrpc;
116 int status;
117 int ret;
118 uint8_t subcmd = 0xff;
119
120 __memcpy_to_gas(dev, &mrpc->input_data, payload, payload_len);
121
122 /* Due to the possible unreliable nature of hardware
123 * communication, function __gas_write32() is implemented
124 * with automatic retry.
125 *
126 * This poses a potential issue when a command is critical
127 * and is expected to be sent only once (e.g., command that
128 * adds a KMSK entry to chip OTP memory). Retrying could
129 * cause the command be sent multiple times (and multiple
130 * KMSK entry being added, if unlucky).
131 *
132 * Here we filter out the specific commands and use 'no retry'
133 * version of gas_write32 for these commands.
134 */
135 if (payload)
136 subcmd = *(uint8_t*)payload;
137 if (gasop_is_no_retry_cmd(cmd, subcmd))
138 __gas_write32_no_retry(dev, cmd, &mrpc->cmd);
139 else
140 __gas_write32(dev, cmd, &mrpc->cmd);
141
142 while (1) {
143 usleep(5000);
144
145 status = __gas_read32(dev, &mrpc->status);
146 if (status != SWITCHTEC_MRPC_STATUS_INPROGRESS)
147 break;
148 }
149
150 if (status == SWITCHTEC_MRPC_STATUS_INTERRUPTED) {
151 errno = ENXIO;
152 return -errno;
153 }
154
155 if(status == SWITCHTEC_MRPC_STATUS_ERROR) {
156 errno = __gas_read32(dev, &mrpc->ret_value);
157 return errno;
158 }
159
160 if (status != SWITCHTEC_MRPC_STATUS_DONE) {
161 errno = ENXIO;
162 return -errno;
163 }
164
165 ret = __gas_read32(dev, &mrpc->ret_value);
166 if (ret)
167 errno = ret;
168
169 if(resp)
170 __memcpy_from_gas(dev, resp, &mrpc->output_data, resp_len);
171
172 return ret;
173}
174
175int gasop_get_device_id(struct switchtec_dev *dev)
176{
177 return gas_reg_read32(dev, sys_info.device_id);
178}
179
180int gasop_get_fw_version(struct switchtec_dev *dev, char *buf,
181 size_t buflen)
182{
183 long long ver;
184
185 ver = gas_reg_read32(dev, sys_info.firmware_version);
186 version_to_string(ver, buf, buflen);
187
188 return 0;
189}
190
191int gasop_pff_to_port(struct switchtec_dev *dev, int pff,
192 int *partition, int *port)
193{
194 int i, part;
195 uint32_t reg;
196 struct part_cfg_regs __gas *pcfg;
197
198 *port = -1;
199
200 for (part = 0; part < dev->partition_count; part++) {
201 pcfg = &dev->gas_map->part_cfg[part];
202 *partition = part;
203
204 reg = __gas_read32(dev, &pcfg->usp_pff_inst_id);
205 if (reg == pff) {
206 *port = 0;
207 return 0;
208 }
209
210 reg = __gas_read32(dev, &pcfg->vep_pff_inst_id);
211 if (reg == pff) {
212 *port = SWITCHTEC_PFF_PORT_VEP;
213 return 0;
214 }
215
216 for (i = 0; i < ARRAY_SIZE(pcfg->dsp_pff_inst_id); i++) {
217 reg = __gas_read32(dev, &pcfg->dsp_pff_inst_id[i]);
218 if (reg != pff)
219 continue;
220
221 *port = i + 1;
222 break;
223 }
224
225 if (*port != -1)
226 return 0;
227 }
228
229 errno = EINVAL;
230 return -EINVAL;
231}
232
233int gasop_port_to_pff(struct switchtec_dev *dev, int partition,
234 int port, int *pff)
235{
236 struct part_cfg_regs __gas *pcfg;
237
238 if (partition < 0) {
239 partition = dev->partition;
240 } else if (partition >= dev->partition_count) {
241 errno = EINVAL;
242 return -errno;
243 }
244
245 pcfg = &dev->gas_map->part_cfg[partition];
246
247 switch (port) {
248 case 0:
249 *pff = __gas_read32(dev, &pcfg->usp_pff_inst_id);
250 break;
251 case SWITCHTEC_PFF_PORT_VEP:
252 *pff = __gas_read32(dev, &pcfg->vep_pff_inst_id);
253 break;
254 default:
255 if (port > ARRAY_SIZE(pcfg->dsp_pff_inst_id)) {
256 errno = EINVAL;
257 return -errno;
258 }
259
260 *pff = __gas_read32(dev, &pcfg->dsp_pff_inst_id[port - 1]);
261 break;
262 }
263
264 return 0;
265}
266
267static void set_fw_info_part(struct switchtec_dev *dev,
268 struct switchtec_fw_image_info *info,
269 struct partition_info __gas *pi)
270{
271 info->part_addr = __gas_read32(dev, &pi->address);
272 info->part_len = __gas_read32(dev, &pi->length);
273}
274
275int gasop_flash_part(struct switchtec_dev *dev,
276 struct switchtec_fw_image_info *info,
277 enum switchtec_fw_image_part_id_gen3 part)
278{
279 struct flash_info_regs __gas *fi = &dev->gas_map->flash_info;
280 struct sys_info_regs __gas *si = &dev->gas_map->sys_info;
281 uint32_t active_addr = -1;
282 int val;
283
284 info->running = false;
285 info->active = false;
286
287 switch (part) {
288 case SWITCHTEC_FW_PART_ID_G3_IMG0:
289 active_addr = __gas_read32(dev, &fi->active_img.address);
290 set_fw_info_part(dev, info, &fi->img0);
291
292 val = __gas_read16(dev, &si->img_running);
293 if (val == SWITCHTEC_IMG0_RUNNING)
294 info->running = true;
295 break;
296
297 case SWITCHTEC_FW_PART_ID_G3_IMG1:
298 active_addr = __gas_read32(dev, &fi->active_img.address);
299 set_fw_info_part(dev, info, &fi->img1);
300
301 val = __gas_read16(dev, &si->img_running);
302 if (val == SWITCHTEC_IMG1_RUNNING)
303 info->running = true;
304 break;
305
306 case SWITCHTEC_FW_PART_ID_G3_DAT0:
307 active_addr = __gas_read32(dev, &fi->active_cfg.address);
308 set_fw_info_part(dev, info, &fi->cfg0);
309
310 val = __gas_read16(dev, &si->cfg_running);
311 if (val == SWITCHTEC_CFG0_RUNNING)
312 info->running = true;
313 break;
314
315 case SWITCHTEC_FW_PART_ID_G3_DAT1:
316 active_addr = __gas_read32(dev, &fi->active_cfg.address);
317 set_fw_info_part(dev, info, &fi->cfg1);
318
319 val = __gas_read16(dev, &si->cfg_running);
320 if (val == SWITCHTEC_CFG1_RUNNING)
321 info->running = true;
322 break;
323
324 case SWITCHTEC_FW_PART_ID_G3_NVLOG:
325 set_fw_info_part(dev, info, &fi->nvlog);
326 break;
327
328 default:
329 return -EINVAL;
330 }
331
332 if (info->part_addr == active_addr)
333 info->active = true;
334
335 return 0;
336}
337
338int gasop_event_summary(struct switchtec_dev *dev,
339 struct switchtec_event_summary *sum)
340{
341 int i;
342 uint32_t reg;
343
344 if (!sum)
345 return 0;
346
347 memset(sum, 0, sizeof(*sum));
348
349 sum->global = gas_reg_read32(dev, sw_event.global_summary);
350 sum->part_bitmap = gas_reg_read64(dev, sw_event.part_event_bitmap);
351
352 for (i = 0; i < dev->partition_count; i++) {
353 reg = gas_reg_read32(dev, part_cfg[i].part_event_summary);
354 sum->part[i] = reg;
355 if (i == dev->partition)
356 sum->local_part = reg;
357 }
358
359 for (i = 0; i < SWITCHTEC_MAX_PFF_CSR; i++) {
360 reg = gas_reg_read16(dev, pff_csr[i].vendor_id);
361 if (reg != MICROSEMI_VENDOR_ID)
362 break;
363
364 sum->pff[i] = gas_reg_read32(dev, pff_csr[i].pff_event_summary);
365 }
366
367 return 0;
368}
369
370static uint32_t __gas *global_ev_reg(struct switchtec_dev *dev,
371 size_t offset, int index)
372{
373 return (void __gas *)&dev->gas_map->sw_event + offset;
374}
375
376static uint32_t __gas *part_ev_reg(struct switchtec_dev *dev,
377 size_t offset, int index)
378{
379 return (void __gas *)&dev->gas_map->part_cfg[index] + offset;
380}
381
382static uint32_t __gas *pff_ev_reg(struct switchtec_dev *dev,
383 size_t offset, int index)
384{
385 return (void __gas *)&dev->gas_map->pff_csr[index] + offset;
386}
387
388#define EV_GLB(i, r)[SWITCHTEC_GLOBAL_EVT_ ## i] = \
389 {offsetof(struct sw_event_regs, r), global_ev_reg}
390#define EV_PAR(i, r)[SWITCHTEC_PART_EVT_ ## i] = \
391 {offsetof(struct part_cfg_regs, r), part_ev_reg}
392#define EV_PFF(i, r)[SWITCHTEC_PFF_EVT_ ## i] = \
393 {offsetof(struct pff_csr_regs, r), pff_ev_reg}
394
395static const struct event_reg {
396 size_t offset;
397 uint32_t __gas *(*map_reg)(struct switchtec_dev *stdev,
398 size_t offset, int index);
399} event_regs[] = {
400 EV_GLB(STACK_ERROR, stack_error_event_hdr),
401 EV_GLB(PPU_ERROR, ppu_error_event_hdr),
402 EV_GLB(ISP_ERROR, isp_error_event_hdr),
403 EV_GLB(SYS_RESET, sys_reset_event_hdr),
404 EV_GLB(FW_EXC, fw_exception_hdr),
405 EV_GLB(FW_NMI, fw_nmi_hdr),
406 EV_GLB(FW_NON_FATAL, fw_non_fatal_hdr),
407 EV_GLB(FW_FATAL, fw_fatal_hdr),
408 EV_GLB(TWI_MRPC_COMP, twi_mrpc_comp_hdr),
409 EV_GLB(TWI_MRPC_COMP_ASYNC, twi_mrpc_comp_async_hdr),
410 EV_GLB(CLI_MRPC_COMP, cli_mrpc_comp_hdr),
411 EV_GLB(CLI_MRPC_COMP_ASYNC, cli_mrpc_comp_async_hdr),
412 EV_GLB(GPIO_INT, gpio_interrupt_hdr),
413 EV_GLB(GFMS, gfms_event_hdr),
414 EV_PAR(PART_RESET, part_reset_hdr),
415 EV_PAR(MRPC_COMP, mrpc_comp_hdr),
416 EV_PAR(MRPC_COMP_ASYNC, mrpc_comp_async_hdr),
417 EV_PAR(DYN_PART_BIND_COMP, dyn_binding_hdr),
418 EV_PFF(AER_IN_P2P, aer_in_p2p_hdr),
419 EV_PFF(AER_IN_VEP, aer_in_vep_hdr),
420 EV_PFF(DPC, dpc_hdr),
421 EV_PFF(CTS, cts_hdr),
422 EV_PFF(UEC, uec_hdr),
423 EV_PFF(HOTPLUG, hotplug_hdr),
424 EV_PFF(IER, ier_hdr),
425 EV_PFF(THRESH, threshold_hdr),
426 EV_PFF(POWER_MGMT, power_mgmt_hdr),
427 EV_PFF(TLP_THROTTLING, tlp_throttling_hdr),
428 EV_PFF(FORCE_SPEED, force_speed_hdr),
429 EV_PFF(CREDIT_TIMEOUT, credit_timeout_hdr),
430 EV_PFF(LINK_STATE, link_state_hdr),
431};
432
433static uint32_t __gas *event_hdr_addr(struct switchtec_dev *dev,
434 enum switchtec_event_id e,
435 int index)
436{
437 size_t off;
438
439 if (e < 0 || e >= SWITCHTEC_MAX_EVENTS)
440 return NULL;
441
442 off = event_regs[e].offset;
443
444 if (event_regs[e].map_reg == part_ev_reg) {
445 if (index < 0)
446 index = dev->partition;
447 else if (index >= dev->partition_count)
448 return NULL;
449 } else if (event_regs[e].map_reg == pff_ev_reg) {
450 if (index < 0 || index >= SWITCHTEC_MAX_PFF_CSR)
451 return NULL;
452 }
453
454 return event_regs[e].map_reg(dev, off, index);
455}
456
457static int event_ctl(struct switchtec_dev *dev, enum switchtec_event_id e,
458 int index, int flags, uint32_t data[5])
459{
460 int i;
461 uint32_t __gas *reg;
462 uint32_t hdr;
463
464 reg = event_hdr_addr(dev, e, index);
465 if (!reg) {
466 errno = EINVAL;
467 return -errno;
468 }
469
470 hdr = __gas_read32(dev, reg);
471 if (data)
472 for (i = 0; i < 5; i++)
473 data[i] = __gas_read32(dev, &reg[i + 1]);
474
475 if (!(flags & SWITCHTEC_EVT_FLAG_CLEAR))
476 hdr &= ~SWITCHTEC_EVENT_CLEAR;
477 if (flags & SWITCHTEC_EVT_FLAG_EN_POLL)
478 hdr |= SWITCHTEC_EVENT_EN_IRQ;
479 if (flags & SWITCHTEC_EVT_FLAG_EN_LOG)
480 hdr |= SWITCHTEC_EVENT_EN_LOG;
481 if (flags & SWITCHTEC_EVT_FLAG_EN_CLI)
482 hdr |= SWITCHTEC_EVENT_EN_CLI;
483 if (flags & SWITCHTEC_EVT_FLAG_EN_FATAL)
484 hdr |= SWITCHTEC_EVENT_FATAL;
485 if (flags & SWITCHTEC_EVT_FLAG_DIS_POLL)
486 hdr &= ~SWITCHTEC_EVENT_EN_IRQ;
487 if (flags & SWITCHTEC_EVT_FLAG_DIS_LOG)
488 hdr &= ~SWITCHTEC_EVENT_EN_LOG;
489 if (flags & SWITCHTEC_EVT_FLAG_DIS_CLI)
490 hdr &= ~SWITCHTEC_EVENT_EN_CLI;
491 if (flags & SWITCHTEC_EVT_FLAG_DIS_FATAL)
492 hdr &= ~SWITCHTEC_EVENT_FATAL;
493
494 if (flags)
495 __gas_write32(dev, hdr, reg);
496
497 return (hdr >> 5) & 0xFF;
498}
499
500int gasop_event_ctl(struct switchtec_dev *dev, enum switchtec_event_id e,
501 int index, int flags, uint32_t data[5])
502{
503 int nr_idxs;
504 int ret = 0;
505
506 if (e >= SWITCHTEC_MAX_EVENTS)
507 goto einval;
508
509 if (index == SWITCHTEC_EVT_IDX_ALL) {
510 if (event_regs[e].map_reg == global_ev_reg)
511 nr_idxs = 1;
512 else if (event_regs[e].map_reg == part_ev_reg)
513 nr_idxs = dev->partition_count;
514 else if (event_regs[e].map_reg == pff_ev_reg)
515 nr_idxs = gas_reg_read8(dev, top.pff_count);
516 else
517 goto einval;
518
519 for (index = 0; index < nr_idxs; index++) {
520 ret = event_ctl(dev, e, index, flags, data);
521 if (ret < 0)
522 return ret;
523 }
524 } else {
525 ret = event_ctl(dev, e, index, flags, data);
526 }
527
528 return ret;
529
530einval:
531 errno = EINVAL;
532 return -errno;
533}
534
535int gasop_event_wait_for(struct switchtec_dev *dev,
536 enum switchtec_event_id e, int index,
537 struct switchtec_event_summary *res,
538 int timeout_ms)
539{
540 struct timeval tv;
541 long long start, now;
542 struct switchtec_event_summary wait_for = {0};
543 int ret;
544
545 ret = switchtec_event_summary_set(&wait_for, e, index);
546 if (ret)
547 return ret;
548
549 ret = switchtec_event_ctl(dev, e, index,
550 SWITCHTEC_EVT_FLAG_CLEAR |
551 SWITCHTEC_EVT_FLAG_EN_POLL,
552 NULL);
553 if (ret < 0)
554 return ret;
555
556 ret = gettimeofday(&tv, NULL);
557 if (ret)
558 return ret;
559
560 now = start = ((tv.tv_sec) * 1000 + tv.tv_usec / 1000);
561
562 while (1) {
563 ret = switchtec_event_check(dev, &wait_for, res);
564 if (ret < 0)
565 return ret;
566
567 if (ret)
568 return 1;
569
570 ret = gettimeofday(&tv, NULL);
571 if (ret)
572 return ret;
573
574 now = ((tv.tv_sec) * 1000 + tv.tv_usec / 1000);
575
576 if (timeout_ms > 0 && now - start >= timeout_ms)
577 return 0;
578
579 usleep(5000);
580 }
581}
GAS Accessor functions.
int switchtec_event_ctl(struct switchtec_dev *dev, enum switchtec_event_id e, int index, int flags, uint32_t data[5])
Enable, disable and clear events or retrieve event data.
Definition platform.c:313
int switchtec_event_summary_set(struct switchtec_event_summary *sum, enum switchtec_event_id e, int index)
Set a bit corresponding to an event in a summary structure.
Definition events.c:175
int switchtec_event_check(struct switchtec_dev *dev, struct switchtec_event_summary *chk, struct switchtec_event_summary *res)
Check if one or more events have occurred.
Definition events.c:297
Event summary bitmaps.
Definition switchtec.h:289
uint64_t part_bitmap
Bitmap of partitions with active events.
Definition switchtec.h:291
uint64_t global
Bitmap of global events.
Definition switchtec.h:290
unsigned part[SWITCHTEC_MAX_PARTS]
Bitmap of events in each partition.
Definition switchtec.h:295
unsigned local_part
Bitmap of events in the local partition.
Definition switchtec.h:292
unsigned pff[SWITCHTEC_MAX_PFF_CSR]
Bitmap of events in each port function.
Definition switchtec.h:298
Information about a firmware image or partition.
Definition switchtec.h:252
size_t part_addr
Address of the partition.
Definition switchtec.h:257
size_t part_len
Length of the partition.
Definition switchtec.h:258
switchtec_event_id
Enumeration of all possible events.
Definition switchtec.h:304